pws1_comm.c 22 KB

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  1. #include "plt.h"
  2. int pws1_comm_init(int idx)
  3. {
  4. struct pws1_t *dev = &pws1[idx];
  5. struct comm_t *comm = &dev->comm;
  6. comm_set_state(comm, COMMST_ERR);
  7. }
  8. int pws1_comm_reset(int idx)
  9. {
  10. struct pws1_t *dev = &pws1[idx];
  11. struct comm_t *comm = &dev->comm;
  12. comm_set_state(comm, COMMST_NORMAL);
  13. comm_set_dac_param_en(comm, 1);
  14. }
  15. int pws1_comm_set_dev_startcmd(int idx)
  16. {
  17. int ret = 0;
  18. struct pws1_t *dev = &pws1[idx];
  19. int chanidx = dev->comm.chanidx;
  20. int addr = dev->comm.adr;
  21. int regaddr = 53900;
  22. int nb = 1;
  23. int trycnt = 0;
  24. unsigned short val;
  25. val = 1;
  26. // modbus tcp connection, no delay
  27. chan_lock(chanidx);
  28. ret = chan_write_single_register(chanidx, addr, regaddr, val);
  29. chan_unlock(chanidx);
  30. if (ret < 0)
  31. {
  32. log_dbg("%s, idx:%d, fail", __func__, idx);
  33. }
  34. return ret;
  35. }
  36. int pws1_comm_set_dev_stopcmd(int idx)
  37. {
  38. int ret = 0;
  39. struct pws1_t *dev = &pws1[idx];
  40. int chanidx = dev->comm.chanidx;
  41. int addr = dev->comm.adr;
  42. int regaddr = 53901;
  43. int nb = 1;
  44. int trycnt = 0;
  45. unsigned short val;
  46. val = 1;
  47. // modbus tcp connection, no delay
  48. chan_lock(chanidx);
  49. ret = chan_write_single_register(chanidx, addr, regaddr, val);
  50. chan_unlock(chanidx);
  51. if (ret < 0)
  52. {
  53. log_dbg("%s, idx:%d, fail", __func__, idx);
  54. }
  55. return ret;
  56. }
  57. // send fault reset cmd to pcs
  58. // 0:invalid 1:reset
  59. int pws1_comm_set_dev_resetcmd(int idx)
  60. {
  61. int ret = 0;
  62. struct pws1_t *dev = &pws1[idx];
  63. int chanidx = dev->comm.chanidx;
  64. int addr = dev->comm.adr;
  65. int regaddr = 53903;
  66. int nb = 1;
  67. int trycnt = 0;
  68. unsigned short val;
  69. val = 1;
  70. // modbus tcp connection, no delay
  71. chan_lock(chanidx);
  72. ret = chan_write_single_register(chanidx, addr, regaddr, val);
  73. chan_unlock(chanidx);
  74. if (ret < 0)
  75. {
  76. log_dbg("%s, idx:%d, fail", __func__, idx);
  77. }
  78. return ret;
  79. }
  80. // 0 on grid
  81. // 1 off grid
  82. int pws1_comm_set_grid_mode(int idx, signed short mode)
  83. {
  84. int ret = 0;
  85. struct pws1_t *dev = &pws1[idx];
  86. int chanidx = dev->comm.chanidx;
  87. int addr = dev->comm.adr;
  88. int regaddr = 53600;
  89. int nb = 1;
  90. int trycnt = 0;
  91. unsigned short val;
  92. val = (unsigned short)mode;
  93. // modbus tcp connection, no delay
  94. chan_lock(chanidx);
  95. ret = chan_write_single_register(chanidx, addr, regaddr, val);
  96. chan_unlock(chanidx);
  97. if (ret < 0)
  98. {
  99. log_dbg("%s, idx:%d, fail", __func__, idx);
  100. }
  101. return ret;
  102. }
  103. // 0:ac dispatching
  104. // 1:dc dispatching
  105. // 2:String dispatching(active power)
  106. int pws1_comm_set_dispatching_mode(int idx, signed short mode)
  107. {
  108. int ret = 0;
  109. struct pws1_t *dev = &pws1[idx];
  110. int chanidx = dev->comm.chanidx;
  111. int addr = dev->comm.adr;
  112. int regaddr = 53601;
  113. int nb = 1;
  114. int trycnt = 0;
  115. unsigned short val;
  116. val = *((unsigned short *)&mode);
  117. // modbus tcp connection, no delay
  118. chan_lock(chanidx);
  119. ret = chan_write_single_register(chanidx, addr, regaddr, val);
  120. chan_unlock(chanidx);
  121. if (ret < 0)
  122. {
  123. log_dbg("%s, idx:%d, fail", __func__, idx);
  124. }
  125. return ret;
  126. }
  127. // 0:fixed active power
  128. // 1:Volt-watt
  129. // 2:freq-watt
  130. // 3:v-w&F-W
  131. int pws1_comm_set_active_power_control_mode(int idx, signed short mode)
  132. {
  133. int ret = 0;
  134. struct pws1_t *dev = &pws1[idx];
  135. int chanidx = dev->comm.chanidx;
  136. int addr = dev->comm.adr;
  137. int regaddr = 53636;
  138. int nb = 1;
  139. int trycnt = 0;
  140. unsigned short val;
  141. val = (unsigned short)mode;
  142. // modbus tcp connection, no delay
  143. chan_lock(chanidx);
  144. ret = chan_write_single_register(chanidx, addr, regaddr, val);
  145. chan_unlock(chanidx);
  146. if (ret < 0)
  147. {
  148. log_dbg("%s, idx:%d, fail", __func__, idx);
  149. }
  150. return ret;
  151. }
  152. //+:chg
  153. //-:dhg
  154. int pws1_comm_set_active_power(int idx, double p)
  155. {
  156. int ret = 0;
  157. struct pws1_t *dev = &pws1[idx];
  158. int chanidx = dev->comm.chanidx;
  159. int addr = dev->comm.adr;
  160. int regaddr = 53622;
  161. int nb = 1;
  162. int trycnt = 0;
  163. short val;
  164. val = p * 10.0;
  165. // modbus tcp connection, no delay
  166. chan_lock(chanidx);
  167. ret = chan_write_single_register(chanidx, addr, regaddr, *((unsigned short *)&val));
  168. chan_unlock(chanidx);
  169. if (ret < 0)
  170. {
  171. log_dbg("%s, idx:%d, fail", __func__, idx);
  172. }
  173. return ret;
  174. }
  175. // status and faults
  176. static void pws1_comm_dac_53000(int idx)
  177. {
  178. unsigned short tab_us[128] = {0};
  179. struct pws1_t *dev = &pws1[idx];
  180. struct comm_t *comm = &dev->comm;
  181. int chanidx = dev->comm.chanidx;
  182. int addr = dev->comm.adr;
  183. int start, nb, rc;
  184. float *temp_f;
  185. int temp_i;
  186. if (comm_get_state(comm) != COMMST_NORMAL)
  187. {
  188. return;
  189. }
  190. nb = 32;
  191. start = 53000;
  192. chan_lock(chanidx);
  193. rc = chan_read_holdingregisters_with_retry(chanidx, addr, start, nb, tab_us);
  194. if (rc < 0)
  195. {
  196. comm_set_state(comm, COMMST_ERR);
  197. }
  198. chan_unlock(chanidx);
  199. if (rc == 0)
  200. { /* read ok */
  201. // fault alarm
  202. dev->status0.value = tab_us[53000 - start];
  203. dev->status1.value = tab_us[53001 - start];
  204. dev->status2.value = tab_us[53002 - start];
  205. dev->status3.value = tab_us[53003 - start];
  206. dev->status4.value = tab_us[53004 - start];
  207. dev->status9.value = tab_us[53009 - start];
  208. dev->status10.value = tab_us[53010 - start];
  209. dev->status11.value = tab_us[53011 - start];
  210. dev->status13.value = tab_us[53013 - start];
  211. dev->status25.value = tab_us[53025 - start];
  212. dev->status27.value = tab_us[53027 - start];
  213. dev->status29.value = tab_us[53029 - start];
  214. dev->status31.value = tab_us[53031 - start];
  215. if (dev->status11.bits_val.pcs_init_status == 0)
  216. {
  217. dev->runState = PWS1_RUNSTAT_PCS_INIT;
  218. sprintf(dev->szrunState, "%s", "PCS init unfinished");
  219. }
  220. else if (dev->status10.bits_val.on_off_status == 0)
  221. {
  222. dev->runState = PWS1_RUNSTAT_STOP;
  223. sprintf(dev->szrunState, "%s", "stop");
  224. }
  225. else if (dev->status10.bits_val.on_off_status == 1 && dev->status13.bits_val.string1_dhg == 0 && dev->status13.bits_val.string1_chg == 0)
  226. {
  227. dev->runState = PWS1_RUNSTAT_IDLE;
  228. sprintf(dev->szrunState, "%s", "idle");
  229. }
  230. else if (dev->status10.bits_val.on_off_status == 1 && dev->status13.bits_val.string1_dhg == 1 && dev->status13.bits_val.string1_chg == 0)
  231. {
  232. dev->runState = PWS1_RUNSTAT_DHG;
  233. sprintf(dev->szrunState, "%s", "dhg");
  234. }
  235. else if (dev->status10.bits_val.on_off_status == 1 && dev->status13.bits_val.string1_dhg == 0 && dev->status13.bits_val.string1_chg == 1)
  236. {
  237. dev->runState = PWS1_RUNSTAT_CHG;
  238. sprintf(dev->szrunState, "%s", "chg");
  239. }
  240. else
  241. {
  242. dev->runState = PWS1_RUNSTAT_UNKOWNING;
  243. sprintf(dev->szrunState, "%s", "unkowning");
  244. }
  245. if (dev->status10.bits_val.on_grid_status == 1 && dev->status10.bits_val.off_grid_status == 0)
  246. {
  247. dev->runMode = PWS1_RUNMOD_ONGRID;
  248. sprintf(dev->szrunMode, "%s", "on grid");
  249. }
  250. else if (dev->status10.bits_val.on_grid_status == 0 && dev->status10.bits_val.off_grid_status == 1)
  251. {
  252. dev->runMode = PWS1_RUNMOD_OFFGRID;
  253. sprintf(dev->szrunMode, "%s", "off grid");
  254. }
  255. else
  256. {
  257. dev->runMode = PWS1_RUNMOD_UNKOWNING;
  258. sprintf(dev->szrunMode, "%s", "unkown");
  259. }
  260. if (dev->status10.bits_val.local_manual_ctl == 1 && dev->status10.bits_val.local_auto_ctl == 0 && dev->status10.bits_val.remote_control == 0)
  261. {
  262. dev->cmdSrc = PWS1_CMD_SRC_LOCAL_MAN;
  263. sprintf(dev->szcmdSrc, "%s", "Local manual");
  264. }
  265. else if (dev->status10.bits_val.local_manual_ctl == 0 && dev->status10.bits_val.local_auto_ctl == 1 && dev->status10.bits_val.remote_control == 0)
  266. {
  267. dev->cmdSrc = PWS1_CMD_SRC_LOCAL_AUTO;
  268. sprintf(dev->szcmdSrc, "%s", "Local manual");
  269. }
  270. else if (dev->status10.bits_val.local_manual_ctl == 0 && dev->status10.bits_val.local_auto_ctl == 0 && dev->status10.bits_val.remote_control == 1)
  271. {
  272. dev->cmdSrc = PWS1_CMD_SRC_REMOTE;
  273. sprintf(dev->szcmdSrc, "%s", "remote EMS");
  274. }
  275. else
  276. {
  277. dev->cmdSrc = PWS1_CMD_SRC_UNKOWNING;
  278. sprintf(dev->szcmdSrc, "%s", "unkowning");
  279. }
  280. if (dev->status11.bits_val.ac_switch_closed == 1)
  281. {
  282. dev->DCbrokerState = 1;
  283. sprintf(dev->szDCbrokerState, "%s", "DC broker on");
  284. }
  285. else
  286. {
  287. dev->DCbrokerState = 0;
  288. sprintf(dev->szDCbrokerState, "%s", "DC broker off");
  289. }
  290. if (dev->status11.bits_val.alarm_status == 0)
  291. {
  292. dev->alarmstatus = 0;
  293. }
  294. else
  295. {
  296. dev->alarmstatus = 1;
  297. }
  298. if (dev->status11.bits_val.faults_status == 0)
  299. {
  300. dev->errstatus = 0;
  301. }
  302. else
  303. {
  304. dev->errstatus = 1;
  305. }
  306. }
  307. }
  308. // 0xF100 PCS internal config
  309. static void pws1_comm_dac_53200(int idx)
  310. {
  311. unsigned short tab_us[128] = {0};
  312. struct pws1_t *dev = &pws1[idx];
  313. struct comm_t *comm = &dev->comm;
  314. int chanidx = dev->comm.chanidx;
  315. int addr = dev->comm.adr;
  316. int start, nb, rc;
  317. if (comm_get_state(comm) != COMMST_NORMAL)
  318. {
  319. return;
  320. }
  321. /* system info */
  322. nb = 57;
  323. start = 53200;
  324. chan_lock(chanidx);
  325. rc = chan_read_holdingregisters_with_retry(chanidx, addr, start, nb, tab_us);
  326. if (rc < 0)
  327. {
  328. comm_set_state(comm, COMMST_ERR);
  329. }
  330. chan_unlock(chanidx);
  331. if (rc == 0)
  332. { /* read ok */
  333. // Ul
  334. dev->Uab = (double)tab_us[53200 - start] * 0.1;
  335. dev->Ubc = (double)tab_us[53201 - start] * 0.1;
  336. dev->Uca = (double)tab_us[53202 - start] * 0.1;
  337. dev->Ia = (double)tab_us[53203 - start] * 0.1 - 1500.0;
  338. dev->Ib = (double)tab_us[53204 - start] * 0.1 - 1500.0;
  339. dev->Ib = (double)tab_us[53205 - start] * 0.1 - 1500.0;
  340. dev->grid_freq = (double)tab_us[53206 - start] * 0.01;
  341. dev->Pa = (double)tab_us[53209 - start] * 0.1 - 400.0;
  342. dev->Pb = (double)tab_us[53210 - start] * 0.1 - 400.0;
  343. dev->Pc = (double)tab_us[53211 - start] * 0.1 - 400.0;
  344. dev->Qa = (double)tab_us[53212 - start] * 0.1 - 400.0;
  345. dev->Qb = (double)tab_us[53213 - start] * 0.1 - 400.0;
  346. dev->Qc = (double)tab_us[53214 - start] * 0.1 - 400.0;
  347. dev->Sa = (double)tab_us[53215 - start] * 0.1 - 400.0;
  348. dev->Sb = (double)tab_us[53216 - start] * 0.1 - 400.0;
  349. dev->Sc = (double)tab_us[53217 - start] * 0.1 - 400.0;
  350. dev->Pfa = (double)tab_us[53218 - start] * 0.01 - 1.0;
  351. dev->Pfb = (double)tab_us[53219 - start] * 0.01 - 1.0;
  352. dev->Pfc = (double)tab_us[53220 - start] * 0.01 - 1.0;
  353. dev->module_temp = (double)tab_us[53221 - start] * 0.1 - 20.0;
  354. dev->ambient_temp = (double)tab_us[53223 - start] * 0.1 - 20.0;
  355. dev->Ps = (double)tab_us[53235 - start] * 0.1 - 1200.0;
  356. dev->Qs = (double)tab_us[53236 - start] * 0.1 - 1200.0;
  357. dev->Ss = (double)tab_us[53237 - start] * 0.1 - 1200.0;
  358. dev->Pfs = (double)tab_us[53238 - start] * 0.01 - 1.0;
  359. dev->chg_accu_energy_ac = (unsigned int)tab_us[53239 - start] << 16 + (unsigned int)tab_us[53240 - start];
  360. dev->dhg_accu_energy_ac = (unsigned int)tab_us[53241 - start] << 16 + (unsigned int)tab_us[53242 - start];
  361. dev->operate_capacity_max = (double)tab_us[53247 - start] * 0.01;
  362. dev->chg_daily_energy_ac = (double)tab_us[53248 - start];
  363. dev->dhg_daily_energy_ac = (double)tab_us[53249 - start];
  364. dev->Pdc = (double)tab_us[53250 - start] * 0.1 - 1500.0;
  365. dev->Udc = (double)(tab_us[53251 - start]) * 0.1;
  366. dev->Idc = (double)tab_us[53252 - start] * 0.1 - 2000.0;
  367. dev->chg_accu_energy_dc = (unsigned int)tab_us[53253 - start] << 16 + (unsigned int)tab_us[53254 - start];
  368. dev->dhg_accu_energy_dc = (unsigned int)tab_us[53255 - start] << 16 + (unsigned int)tab_us[53256 - start];
  369. }
  370. }
  371. static void pws1_comm_dac_53579(int idx)
  372. {
  373. unsigned short tab_us[128] = {0};
  374. struct pws1_t *dev = &pws1[idx];
  375. struct comm_t *comm = &dev->comm;
  376. int chanidx = dev->comm.chanidx;
  377. int addr = dev->comm.adr;
  378. int start, nb, rc;
  379. if (comm_get_state(comm) != COMMST_NORMAL)
  380. {
  381. return;
  382. }
  383. /* system info */
  384. nb = 47;
  385. start = 53579;
  386. chan_lock(chanidx);
  387. rc = chan_read_holdingregisters_with_retry(chanidx, addr, start, nb, tab_us);
  388. if (rc < 0)
  389. {
  390. comm_set_state(comm, COMMST_ERR);
  391. }
  392. chan_unlock(chanidx);
  393. if (rc == 0)
  394. { /* read ok */
  395. memcpy((void *)dev->CabSN, (void *)&tab_us[53579 - start], 22);
  396. dev->MonitorSoftInerCode = tab_us[53590 - start];
  397. dev->ACsoftInerCode = tab_us[53591 - start];
  398. dev->U2softInerCode = tab_us[53593 - start];
  399. dev->softwareV = tab_us[53593 - start];
  400. }
  401. }
  402. const int reactive_p_set = 53623 - 53600;
  403. static void pws1_comm_dac_53600(int idx)
  404. {
  405. unsigned short tab_us[128] = {0};
  406. struct pws1_t *dev = &pws1[idx];
  407. struct comm_t *comm = &dev->comm;
  408. int chanidx = dev->comm.chanidx;
  409. int addr = dev->comm.adr;
  410. int start, nb, rc;
  411. if (comm_get_state(comm) != COMMST_NORMAL)
  412. {
  413. return;
  414. }
  415. /* system info */
  416. nb = 65;
  417. start = 53600;
  418. chan_lock(chanidx);
  419. rc = chan_read_holdingregisters_with_retry(chanidx, addr, start, nb, tab_us);
  420. if (rc < 0)
  421. {
  422. comm_set_state(comm, COMMST_ERR);
  423. }
  424. chan_unlock(chanidx);
  425. if (rc == 0)
  426. { /* read ok */
  427. dev->energy_dispatching_mode = *((signed short *)(&tab_us[53601 - start]));
  428. if (dev->energy_dispatching_mode == 0)
  429. {
  430. sprintf(dev->szEnergy_dispatching_mode, "%s", "AC dispatching");
  431. }
  432. else if (dev->energy_dispatching_mode == 1)
  433. {
  434. sprintf(dev->szEnergy_dispatching_mode, "%s", "DC dispatching");
  435. }
  436. else if (dev->energy_dispatching_mode == 2)
  437. {
  438. sprintf(dev->szEnergy_dispatching_mode, "%s", "String dispatching");
  439. }
  440. else
  441. {
  442. sprintf(dev->szEnergy_dispatching_mode, "%s", "unkown dispatching");
  443. }
  444. dev->start_up_mode = *((signed short *)(&tab_us[53602 - start]));
  445. if (dev->start_up_mode == 0)
  446. {
  447. sprintf(dev->szStart_up_mode, "%s", "auto startup");
  448. }
  449. else if (dev->start_up_mode == 1)
  450. {
  451. sprintf(dev->szStart_up_mode, "%s", "manual startup");
  452. }
  453. else
  454. {
  455. sprintf(dev->szStart_up_mode, "%s", "unkown startup");
  456. }
  457. dev->reactive_power_cotrol_mode = *((signed short *)(&tab_us[53620 - start]));
  458. dev->Pf_setpoint = (double)(*((signed short *)(&tab_us[53621 - start]))) * 0.01;
  459. dev->active_p_set = (double)(*((signed short *)&tab_us[53622 - start])) * 0.1; // active power set
  460. dev->reactive_p_set = (double)(*((signed short *)&tab_us[reactive_p_set])) * 0.1;
  461. dev->power_change_mode = (signed short)(tab_us[53626 - start]);
  462. if (dev->power_change_mode == 0)
  463. {
  464. sprintf(dev->szPower_change_mode, "%s", "step");
  465. }
  466. else if (dev->power_change_mode == 1)
  467. {
  468. sprintf(dev->szPower_change_mode, "%s", "ramp");
  469. }
  470. else
  471. {
  472. sprintf(dev->szPower_change_mode, "%s", "unkown power change mode");
  473. }
  474. dev->grid_reconnect_delay = *((signed short *)(&tab_us[53627 - start]));
  475. dev->offgrid_ac_voltage_regulation = (double)(*((signed short *)(&tab_us[53628 - start]))) * 0.01;
  476. dev->offgrid_ac_freq_regulation = (double)(*((signed short *)(&tab_us[53630 - start]))) * 0.01;
  477. dev->FVRT_limit_fun = *((signed short *)(&tab_us[53631 - start]));
  478. dev->FVRT_fun_enable = *((signed short *)(&tab_us[53632 - start]));
  479. dev->anti_islanding_enable = *((signed short *)(&tab_us[53633 - start]));
  480. dev->offgrid_ac_vol_startup_mode = *((signed short *)(&tab_us[53635 - start]));
  481. if (dev->offgrid_ac_vol_startup_mode == 0)
  482. {
  483. sprintf(dev->szOffgrid_ac_vol_startup_mode, "%s", "step");
  484. }
  485. else if (dev->offgrid_ac_vol_startup_mode == 1)
  486. {
  487. sprintf(dev->szOffgrid_ac_vol_startup_mode, "%s", "soft-start");
  488. }
  489. else
  490. {
  491. sprintf(dev->szOffgrid_ac_vol_startup_mode, "%s", "unkown");
  492. }
  493. dev->active_power_control_mode = *((signed short *)(&tab_us[53636 - start]));
  494. if (dev->active_power_control_mode == 0)
  495. {
  496. sprintf(dev->szActive_power_control_mode, "%s", "fixed active power");
  497. }
  498. else if (dev->active_power_control_mode == 1)
  499. {
  500. sprintf(dev->szActive_power_control_mode, "%s", "Volt-watt");
  501. }
  502. else if (dev->active_power_control_mode == 2)
  503. {
  504. sprintf(dev->szActive_power_control_mode, "%s", "Freq-watt");
  505. }
  506. else if (dev->active_power_control_mode == 3)
  507. {
  508. sprintf(dev->szActive_power_control_mode, "%s", "V-W&F-W");
  509. }
  510. else
  511. {
  512. sprintf(dev->szActive_power_control_mode, "%s", "unkown");
  513. }
  514. dev->RR_normal_ramp_rate = (double)tab_us[53638 - start] * 0.001;
  515. dev->SS_soft_start_ramp_rate = (double)tab_us[53639 - start] * 0.001;
  516. dev->dc_control_mode = *((signed short *)(&tab_us[53650 - start]));
  517. if (dev->dc_control_mode == 0)
  518. {
  519. sprintf(dev->szDc_control_mode, "%s", "fix current");
  520. }
  521. else if (dev->dc_control_mode == 1)
  522. {
  523. sprintf(dev->szDc_control_mode, "%s", "fix power");
  524. }
  525. else
  526. {
  527. sprintf(dev->szDc_control_mode, "%s", "unkown");
  528. }
  529. dev->dc_current_set = (double)(*((signed short *)(&tab_us[53651 - start]))) * 0.1;
  530. dev->dc_pset = (double)(*((signed short *)(&tab_us[53652 - start]))) * 0.1;
  531. dev->dc_lower_v_threshold = (double)(*((signed short *)(&tab_us[53653 - start]))) * 0.1;
  532. dev->dc_end_of_dhg_v = (double)(*((signed short *)(&tab_us[53655 - start]))) * 0.1;
  533. dev->top_chg_v = (double)(*((signed short *)(&tab_us[53660 - start]))) * 0.1;
  534. dev->end_of_chg_current = (double)(*((signed short *)(&tab_us[53662 - start]))) * 0.1;
  535. dev->max_chg_current = (double)(*((signed short *)(&tab_us[53663 - start]))) * 0.1;
  536. dev->max_dhg_current = (double)(*((signed short *)(&tab_us[53664 - start]))) * 0.1;
  537. }
  538. }
  539. // power up one time
  540. static void pws1_comm_dac_53670(int idx)
  541. {
  542. unsigned short tab_us[128] = {0};
  543. struct pws1_t *dev = &pws1[idx];
  544. struct comm_t *comm = &dev->comm;
  545. int chanidx = dev->comm.chanidx;
  546. int addr = dev->comm.adr;
  547. int start, nb, rc;
  548. if (comm_get_state(comm) != COMMST_NORMAL)
  549. {
  550. return;
  551. }
  552. /* system info */
  553. nb = 38;
  554. start = 53670;
  555. chan_lock(chanidx);
  556. rc = chan_read_holdingregisters_with_retry(chanidx, addr, start, nb, tab_us);
  557. if (rc < 0)
  558. {
  559. comm_set_state(comm, COMMST_ERR);
  560. }
  561. chan_unlock(chanidx);
  562. if (rc == 0)
  563. { /* read ok */
  564. dev->ov_region1_boundary = (double)(*((signed short *)(&tab_us[53670 - start]))) * 0.01;
  565. dev->ov_region1_trip_time = (double)(*((signed short *)(&tab_us[53671 - start]))) * 0.01;
  566. dev->ov_region2_boundary = (double)(*((signed short *)(&tab_us[53672 - start]))) * 0.01;
  567. dev->ov_region2_trip_time = (double)(*((signed short *)(&tab_us[53673 - start]))) * 0.01;
  568. dev->uv_region1_boundary = (double)(*((signed short *)(&tab_us[53674 - start]))) * 0.01;
  569. dev->uv_region1_trip_time = (double)(*((signed short *)(&tab_us[53675 - start]))) * 0.01;
  570. dev->uv_region2_boundary = (double)(*((signed short *)(&tab_us[53676 - start]))) * 0.01;
  571. dev->uv_region2_trip_time = (double)(*((signed short *)(&tab_us[53677 - start]))) * 0.01;
  572. dev->of_region1_boundary = (double)(*((signed short *)(&tab_us[53700 - start]))) * 0.01;
  573. dev->of_region1_trip_time = (double)tab_us[53701 - start] * 0.01;
  574. dev->of_region2_boundary = (double)(*((signed short *)(&tab_us[53702 - start]))) * 0.01;
  575. dev->of_region2_trip_time = (double)tab_us[53703 - start] * 0.01;
  576. dev->uf_region1_boundary = (double)(*((signed short *)(&tab_us[53704 - start]))) * 0.01;
  577. dev->uf_region1_trip_time = (double)tab_us[53705 - start] * 0.01;
  578. dev->uf_region2_boundary = (double)(*((signed short *)(&tab_us[53706 - start]))) * 0.01;
  579. dev->uf_region2_trip_time = (double)tab_us[53707 - start] * 0.01;
  580. }
  581. }
  582. static void pws1_comm_dac_56000(int idx)
  583. {
  584. unsigned short tab_us[128] = {0};
  585. struct pws1_t *dev = &pws1[idx];
  586. struct comm_t *comm = &dev->comm;
  587. int chanidx = dev->comm.chanidx;
  588. int addr = dev->comm.adr;
  589. int start, nb, rc;
  590. if (comm_get_state(comm) != COMMST_NORMAL)
  591. {
  592. return;
  593. }
  594. /* system info */
  595. nb = 38;
  596. start = 56000;
  597. chan_lock(chanidx);
  598. rc = chan_read_holdingregisters_with_retry(chanidx, addr, start, nb, tab_us);
  599. if (rc < 0)
  600. {
  601. comm_set_state(comm, COMMST_ERR);
  602. }
  603. chan_unlock(chanidx);
  604. if (rc == 0)
  605. { /* read ok */
  606. dev->year = tab_us[56000 - start];
  607. dev->month = tab_us[56001 - start];
  608. dev->day = tab_us[56002 - start];
  609. dev->hour = tab_us[56003 - start];
  610. dev->minute = tab_us[56004 - start];
  611. dev->second = tab_us[56005 - start];
  612. dev->bms_comm_time_out = tab_us[56006 - start];
  613. dev->rs485_comm_time_out = tab_us[56007 - start];
  614. dev->tcp_comm_time_out = tab_us[56008 - start];
  615. }
  616. }
  617. void pws1_comm_dac(int idx)
  618. {
  619. struct ies1000_t *dev = &ies1000[idx];
  620. struct comm_t *comm = &dev->comm;
  621. unsigned short tab_us[128] = {0};
  622. int start, nb;
  623. int chan_idx = dev->comm.chanidx;
  624. int addr = dev->comm.adr;
  625. int ret = 0;
  626. if (comm_get_state(comm) != COMMST_NORMAL)
  627. {
  628. return;
  629. }
  630. comm_start_cal_dac_timing(comm);
  631. if (comm_get_dac_param_en(comm) == 1)
  632. {
  633. comm_set_dac_param_en(comm, 0);
  634. pws1_comm_dac_53670(idx);
  635. }
  636. pws1_comm_dac_53000(idx);
  637. pws1_comm_dac_53200(idx);
  638. pws1_comm_dac_53579(idx);
  639. pws1_comm_dac_53600(idx);
  640. pws1_comm_dac_56000(idx);
  641. }