n9_sm.c 33 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885
  1. #include "plt.h"
  2. static struct state_t n9_states[] = {
  3. {SMST_LAUNCH, "launch"},
  4. {SMST_STDBY, "stdby"},
  5. {SMST_STOP, "stop"},
  6. {SMST_READY, "ready"},
  7. {SMST_DHG, "dhg"},
  8. {SMST_CHG, "chg"},
  9. {SMST_OFFGRID, "offgrid"},
  10. {SMST_ERR, "err"},
  11. };
  12. static struct err_t n9_errs[] = {
  13. {N9ERR_NONE, "none"},
  14. // launch IES1000ERR_LAUNCH_COMMERR
  15. {N9ERR_LAUNCH_COMMERR, "launch, comm err"},
  16. // err
  17. {N9ERR_ERR_COMMERR, "err, comm err"},
  18. {N9ERR_ERR_PWRUP, "err, pwrup"},
  19. {N9ERR_ERR_PWROFF, "err, power off"},
  20. // stdby
  21. {N9ERR_STDBY_COMMERR, "stdby, comm err"},
  22. {N9ERR_STDBY_CHK_DEVAPS0_FAIL_AFTER_SET, "stdby, chk aps = 0 fail"},
  23. {N9ERR_STDBY_WAIT_STOP_TIMEOUT, "stdby, chk stop fail"},
  24. // stop
  25. {N9ERR_STOP_COMMERR, "stop, comm err"},
  26. {N9ERR_STOP_NONE_STOP_DETECTED, "stop, none stop run state detected"},
  27. {N9ERR_STOP_CHK_DEVAPS0_FAIL_AFTER_SET, "stop, chk dev aps = 0 fail"},
  28. {N9ERR_STOP_WAIT_START_TIMEOUT, "stop, wait start timeout"},
  29. // ready
  30. {N9ERR_READY_COMMERR, "ready, comm err"},
  31. {N9ERR_READY_NOSTART_DETECTED, "ready, no start detected"},
  32. {N9ERR_READY_WAIT_STOP_TIMEOUT, "ready, wait stop timeout"},
  33. {N9ERR_READY_WAIT_AP_OVER_0_TIMEOUT, "ready, wait ap over zero time out"},
  34. {N9ERR_READY_WAIT_AP_UNDER_0_TIMEOUT, "ready, wait ap under zero time out"},
  35. // dhg
  36. {N9ERR_DHG_COMMERR, "dhg, comm err"},
  37. {N9ERR_DHG_NONDHG_DETECTED, "dhg, none dhg detected"},
  38. {N9ERR_DHG_WAIT_DEVAPS0_FOR_READYCMD_TIMEOUT, "dhg, wait set dev aps = 0 time out"},
  39. {N9ERR_DHG_WAIT_AP0_FOR_READYCMD_TIMEOUT, "dhg, wait ap = 0 for ready cmd time out"},
  40. {N9ERR_DHG_TICK_TIMEOUT_DETECTED, "dhg, tick timeout"},
  41. // chg
  42. {N9ERR_CHG_COMMERR, "chg, comm err"},
  43. {N9ERR_CHG_NONCHG_DETECTED, "chg, none dhg detected"},
  44. {N9ERR_CHG_WAIT_DEVAPS0_FOR_READYCMD_TIMEOUT, "chg, wait set dev aps = 0 time out"},
  45. {N9ERR_CHG_WAIT_AP0_FOR_READYCMD_TIMEOUT, "chg, wait ap = 0 for ready cmd time out"},
  46. {N9ERR_CHG_TICK_TIMEOUT_DETECTED, "chg, tick timeout"},
  47. // offgrid
  48. {N9ERR_OFFGRID_ERRSTAT_DETECTED, "offgrid, err state detected"},
  49. {N9ERR_OFFGRID_NON_DHGCHG_DETECTED, "offgrid, non dhg chg state detected"},
  50. };
  51. int n9_sm_init(int idx)
  52. {
  53. struct statemachine_t *sm = &n9[idx].sm;
  54. sm_reset_timing(sm, 10, 10);
  55. sm->states = n9_states;
  56. sm->state_nbr = sizeof(n9_states) / sizeof(struct state_t);
  57. sm->errs = n9_errs;
  58. sm->err_nbr = sizeof(n9_errs) / sizeof(struct err_t);
  59. sm_set_state(sm, SMST_LAUNCH, N9ERR_NONE);
  60. return 0;
  61. }
  62. static void n9_sm_launch(int idx)
  63. {
  64. struct n9_t *dev = &n9[idx];
  65. struct comm_t *comm = &dev->comm;
  66. struct statemachine_t *sm = &dev->sm;
  67. if (sm_get_step(sm) == 0)
  68. { // entry
  69. log_dbg("%s, idx:%d, state:%s, step:%d, entry", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  70. n9_reset_cmd(idx);
  71. n9_comm_reset(idx);
  72. sm_set_step(sm, 20);
  73. }
  74. else if (sm_get_step(sm) == 20)
  75. {
  76. if (comm_get_state(comm) == COMMST_NORMAL)
  77. {
  78. log_dbg("%s, idx:%d, state:%s, step:%d, comm ok, goto stdby",
  79. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  80. sm_set_state(sm, SMST_STDBY, N9ERR_NONE);
  81. }
  82. else
  83. {
  84. log_dbg("%s, idx:%d, state:%s, step:%d, comm err detected, goto err",
  85. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  86. sm_set_state(sm, SMST_ERR, N9ERR_LAUNCH_COMMERR);
  87. }
  88. }
  89. }
  90. static void n9_sm_err(int idx)
  91. {
  92. struct n9_t *dev = &n9[idx];
  93. struct comm_t *comm = &n9[idx].comm;
  94. struct statemachine_t *sm = &n9[idx].sm;
  95. static double ts_last_try;
  96. double ts;
  97. if (sm_get_step(sm) == 0)
  98. { // entry
  99. log_dbg("%s, idx:%d, state:%s, step:%d, entry", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  100. n9_reset_cmd(idx);
  101. n9_set_dev_stopcmd(idx); // if err, stop device immediately
  102. sm_set_step(sm, 10);
  103. ts_last_try = sm_get_timeofday();
  104. }
  105. else if (sm_get_step(sm) == 10)
  106. { // wait cmd
  107. ts = sm_get_timeofday();
  108. if (n9_get_cmd(idx) == CMD_SM_STDBY)
  109. { // stdby cmd
  110. log_dbg("%s, idx:%d, state:%s, step:%d, get stdby cmd, reset comm then chk",
  111. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  112. n9_reset_cmd(idx);
  113. n9_comm_reset(idx);
  114. sm_set_step(sm, 20);
  115. }
  116. else if (comm_get_state(comm) != COMMST_NORMAL && (ts - ts_last_try > 60000))
  117. { // 60s
  118. log_dbg("%s, idx:%d, state:%s, step:%d,comm:%s,reset comm",
  119. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), comm_get_state_str(comm));
  120. ts_last_try = ts;
  121. n9_comm_reset(idx);
  122. }
  123. }
  124. else if (sm_get_step(sm) == 20)
  125. { /* chk comm state */
  126. if (comm_get_state(comm) == COMMST_NORMAL)
  127. {
  128. log_dbg("%s, idx:%d, state:%s, step:%d, comm ok, goto stdby",
  129. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  130. sm_set_state(sm, SMST_STDBY, N9ERR_NONE);
  131. }
  132. else
  133. {
  134. log_dbg("%s, idx:%d, state:%s, step:%d, comm err detected, stay err",
  135. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  136. sm_set_state(sm, SMST_ERR, N9ERR_ERR_COMMERR);
  137. }
  138. }
  139. }
  140. static void n9_sm_stdby(int idx)
  141. {
  142. struct n9_t *dev = &n9[idx];
  143. struct comm_t *comm = &n9[idx].comm;
  144. struct statemachine_t *sm = &dev->sm;
  145. /* chk comm state */
  146. if (comm_get_state(comm) != COMMST_NORMAL)
  147. {
  148. log_dbg("%s, idx:%d, state:%s, step:%d, comm err detected, goto err",
  149. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  150. sm_set_state(sm, SMST_ERR, N9ERR_STDBY_COMMERR);
  151. return;
  152. }
  153. if (sm_get_step(sm) == 0)
  154. { /* entry */
  155. n9_reset_cmd(idx);
  156. // n9_set_dev_resetcmd(idx); // cyx : stdby : 各种设备保持原样
  157. // n9_set_dev_stopcmd(idx);
  158. sm_set_step(sm, 10);
  159. }
  160. else if (sm_get_step(sm) == 10)
  161. { /* wait cmd */
  162. if (n9_get_cmd(idx) == CMD_SM_STOP)
  163. { /* stop cmd */
  164. log_dbg("%s, idx:%d, state:%s, step:%d, get stop cmd, chk devaps = 0 ?", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  165. n9_reset_cmd(idx);
  166. sm_set_step(sm, 20);
  167. }
  168. }
  169. else if (sm_get_step(sm) == 20)
  170. { /* chk devaps = 0 ? */
  171. if (n9_get_dev_aps(idx) != 0)
  172. {
  173. log_dbg("%s, idx:%d, state:%s, step:%d, devaps != 0 detected, set it to 0, wait and chk", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  174. n9_set_dev_aps(idx, 0);
  175. sm_set_step(sm, 30);
  176. }
  177. else
  178. {
  179. log_dbg("%s, idx:%d, state:%s, step:%d, devaps = 0 detected, chk stop state", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  180. sm_set_step(sm, 40);
  181. }
  182. }
  183. else if (sm_get_step(sm) == 30)
  184. { /* wait and chk devaps = 0 */
  185. if (n9_get_dev_aps(idx) == 0)
  186. {
  187. log_dbg("%s, idx:%d, state:%s, step:%d, devaps = 0 detected, chk stop state", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  188. sm_set_step(sm, 40);
  189. }
  190. else
  191. {
  192. log_dbg("%s, idx:%d, state:%s, step:%d, chk devaps = 0 fail after set, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  193. sm_set_state(sm, SMST_ERR, N9ERR_STDBY_CHK_DEVAPS0_FAIL_AFTER_SET);
  194. }
  195. }
  196. else if (sm_get_step(sm) == 40)
  197. { /* chk runstate = stop ? */
  198. if (N9_RUNSTAT_IDLE != n9_get_runstat(idx))
  199. {
  200. log_dbg("%s, idx:%d, state:%s, step:%d, non-stop run state detected, send stop cmd, wait and chk", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  201. n9_set_dev_stopcmd(idx); // when stdby->stop, stop device
  202. sm_set_step(sm, 50);
  203. sm_set_count(sm, 0);
  204. }
  205. else
  206. {
  207. log_dbg("%s, idx:%d, state:%s, step:%d, stop run state detected, goto stop",
  208. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  209. sm_set_state(sm, SMST_STOP, N9ERR_NONE);
  210. }
  211. }
  212. else if (sm_get_step(sm) == 50)
  213. { /* wait run state = stop after stopcmd*/
  214. if (N9_RUNSTAT_IDLE == n9_get_runstat(idx))
  215. {
  216. log_dbg("%s, idx:%d, state:%s, step:%d, stop run state detected, goto stop", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  217. sm_set_state(sm, SMST_STOP, N9ERR_NONE);
  218. }
  219. else
  220. {
  221. sm_inc_count(sm);
  222. if (sm_get_count(sm) >= 100)
  223. {
  224. log_dbg("%s, idx:%d, state:%s, step:%d, wait stop run state timeout, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  225. sm_set_state(sm, SMST_ERR, N9ERR_STDBY_WAIT_STOP_TIMEOUT);
  226. }
  227. else
  228. {
  229. if (sm_get_count(sm) % 50 == 0)
  230. {
  231. log_dbg("%s, idx:%d, state:%s, step:%d, waiting stop run state, count:%d", __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  232. }
  233. }
  234. }
  235. }
  236. }
  237. static void n9_sm_offgrid(int idx)
  238. {
  239. // struct ies1000_t* dev = &ies1000[idx];
  240. // struct comm_t* comm = &ies1000[idx].comm;
  241. // struct statemachine_t* sm = &ies1000[idx].sm;
  242. // // chk comm state
  243. // if( comm_get_state(comm) != COMMST_NORMAL){
  244. // log_dbg("%s, idx:%d, state:%s, step:%d, comm err detected, goto err",
  245. // __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  246. // sm_set_state(sm, SMST_ERR, IES1000ERR_STOP_COMMERR);
  247. // return;
  248. // }
  249. // if( sm_get_step(sm) == 0 ){ // entry
  250. // ies1000_reset_cmd(idx);
  251. // sm_set_step(sm, 10);
  252. // }else if( sm_get_step(sm) == 10 ){ // wait cmd and chk
  253. // if( ies1000_get_cmd(idx) == CMD_SM_READY ){ // ready cmd
  254. // log_dbg("%s, idx:%d, state:%s, step:%d, get ready cmd, set dev idlecmd, goto ready",__func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  255. // ies1000_reset_cmd(idx);
  256. // ies1000_set_dev_idlecmd(idx);
  257. // sm_set_state(sm, SMST_READY, IES1000ERR_NONE);
  258. // }else if( ies1000_get_errstat(idx) != 0){
  259. // log_dbg("%s, idx:%d, state:%s, step:%d, err state detected, goto err",__func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  260. // sm_set_state(sm, SMST_ERR, IES1000ERR_OFFGRID_ERRSTAT_DETECTED);
  261. // }else if( ies1000_get_runstat(idx) != IES1000_RUNSTAT_CHG && ies1000_get_runstat(idx) != IES1000_RUNSTAT_DHG){
  262. // log_dbg("%s, idx:%d, state:%s, step:%d, non dhg chg run state detected, goto err",__func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  263. // sm_set_state(sm, SMST_ERR, IES1000ERR_OFFGRID_NON_DHGCHG_DETECTED);
  264. // }else{
  265. // }
  266. // }
  267. }
  268. static void n9_sm_stop(int idx)
  269. {
  270. struct n9_t *dev = &n9[idx];
  271. struct comm_t *comm = &dev->comm;
  272. struct statemachine_t *sm = &dev->sm;
  273. /* chk comm state */
  274. if (comm_get_state(comm) != COMMST_NORMAL)
  275. {
  276. log_dbg("%s, idx:%d, state:%s, step:%d, comm err detected, goto err",
  277. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  278. sm_set_state(sm, SMST_ERR, N9ERR_STOP_COMMERR);
  279. return;
  280. }
  281. if (sm_get_step(sm) == 0)
  282. { // entry
  283. n9_reset_cmd(idx);
  284. n9_set_aps(idx, 0);
  285. sm_set_step(sm, 10);
  286. }
  287. else if (sm_get_step(sm) == 10)
  288. { // wait cmd and chk
  289. if (n9_get_cmd(idx) == CMD_SM_STDBY)
  290. { // stdby cmd
  291. log_dbg("%s, idx:%d, state:%s, step:%d, get stdby cmd, goto stdby", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  292. n9_reset_cmd(idx);
  293. sm_set_state(sm, SMST_STDBY, N9ERR_NONE);
  294. }
  295. else if (n9_get_cmd(idx) == CMD_SM_READY)
  296. { // ready cmd
  297. log_dbg("%s, idx:%d, state:%s, step:%d, get ready cmd, set dev resetcmd, chk dev aps", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  298. n9_reset_cmd(idx);
  299. sm_set_step(sm, 20);
  300. n9_set_dev_resetcmd(idx);
  301. }
  302. else
  303. { /* no cmd, do chking */
  304. if (N9_RUNSTAT_IDLE != n9_get_runstat(idx))
  305. {
  306. log_dbg("%s, idx:%d, state:%s, step:%d, run state != stop detected, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  307. sm_set_state(sm, SMST_ERR, N9ERR_STOP_NONE_STOP_DETECTED);
  308. }
  309. }
  310. }
  311. else if (sm_get_step(sm) == 20)
  312. { /* chk devaps = 0 ? */
  313. if (n9_get_dev_aps(idx) != 0)
  314. {
  315. log_dbg("%s, idx:%d, state:%s, step:%d, dev aps != 0 detected, set it to 0, then chk", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  316. n9_set_dev_aps(idx, 0);
  317. sm_set_step(sm, 30);
  318. }
  319. else
  320. {
  321. log_dbg("%s, idx:%d, state:%s, step:%d, dev aps = 0 detected, goto set pcs start cmd", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  322. sm_set_step(sm, 40);
  323. }
  324. }
  325. else if (sm_get_step(sm) == 30)
  326. { /* wait and chk devaps = 0 */
  327. if (n9_get_dev_aps(idx) == 0)
  328. {
  329. log_dbg("%s, idx:%d, state:%s, step:%d, dev aps = 0 detected,got set pcs start cmd", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  330. sm_set_step(sm, 40);
  331. }
  332. else
  333. {
  334. log_dbg("%s, idx:%d, state:%s, step:%d, chk dev aps = 0 fail, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  335. sm_set_state(sm, SMST_ERR, N9ERR_STOP_CHK_DEVAPS0_FAIL_AFTER_SET);
  336. }
  337. }
  338. else if (sm_get_step(sm) == 40)
  339. {
  340. log_dbg("%s, idx:%d, state:%s, step:%d, set pcs start cmd and goto wait pcs start", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  341. n9_set_dev_startcmd(idx);
  342. sm_set_step(sm, 50);
  343. }
  344. else if (sm_get_step(sm) == 50)
  345. { // wait pcs idle
  346. if (N9_RUNSTAT_RUN == n9_get_runstat(idx))
  347. {
  348. log_dbg("%s, idx:%d, state:%s, step:%d, chk pcs start ok, goto ready", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  349. sm_set_state(sm, SMST_READY, N9ERR_NONE);
  350. }
  351. else
  352. {
  353. sm_inc_count(sm);
  354. if (sm_get_count(sm) >= 200)
  355. { /* should over 10s */
  356. sm_set_state(sm, SMST_ERR, N9ERR_STOP_WAIT_START_TIMEOUT);
  357. log_dbg("%s, idx:%d, state:%s, step:%d, wait pcs start timeout, goto err",
  358. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  359. }
  360. else
  361. {
  362. if (sm_get_count(sm) % 50 == 0)
  363. {
  364. log_dbg("%s, idx:%d, state:%s, step:%d, waiting wait pcs start, count:%d",
  365. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  366. }
  367. }
  368. }
  369. }
  370. }
  371. static void n9_sm_ready(int idx)
  372. {
  373. struct n9_t *dev = &n9[idx];
  374. struct comm_t *comm = &dev->comm;
  375. struct statemachine_t *sm = &dev->sm;
  376. int aps = n9_get_aps(idx);
  377. int ap = n9_get_ap(idx);
  378. /* chk comm state */
  379. if (comm_get_state(comm) != COMMST_NORMAL)
  380. {
  381. log_dbg("%s, idx:%d, state:%s, step:%d, comm err detected, goto err",
  382. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  383. sm_set_state(sm, SMST_ERR, N9ERR_READY_COMMERR);
  384. return;
  385. }
  386. if (sm_get_step(sm) == 0)
  387. { // entry
  388. log_dbg("%s, idx:%d, state:%s, step:%d, entry", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  389. n9_reset_cmd(idx);
  390. n9_reset_aps(idx);
  391. sm_set_step(sm, 10);
  392. }
  393. else if (sm_get_step(sm) == 10)
  394. { // wait and chk
  395. if (n9_get_cmd(idx) == CMD_SM_STOP)
  396. { // stop cmd
  397. log_dbg("%s, idx:%d, state:%s, step:%d, get stop cmd, dev stop cmd sent, wait and chk", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  398. n9_reset_cmd(idx);
  399. n9_set_dev_stopcmd(idx);
  400. sm_set_step(sm, 20);
  401. sm_set_count(sm, 0);
  402. }
  403. else if (aps > 0)
  404. { // new aps, prepare to dhg
  405. log_dbg("%s, idx:%d, state:%s, step:%d, aps > 0 detected, %d, set dev aps, wait and chk",
  406. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), aps);
  407. n9_set_dev_aps(idx, aps);
  408. sm_set_step(sm, 30);
  409. sm_set_count(sm, 0);
  410. }
  411. else if (aps < 0)
  412. { // new aps, prepare to chg
  413. log_dbg("%s, idx:%d, state:%s, step:%d, aps < 0 detected, %d, set dev aps, wait and chk",
  414. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), aps);
  415. n9_set_dev_aps(idx, aps);
  416. sm_set_step(sm, 40);
  417. sm_set_count(sm, 0);
  418. } /*else if( ies1000_get_cmd(idx) == CMD_SM_OFFGRID ){ // offgrid cmd
  419. log_dbg("%s, idx:%d, state:%s, step:%d, get offgrid cmd, set dev run mode = offgrid, wait and chk",__func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  420. ies1000_reset_cmd(idx);
  421. ies1000_set_dev_runmod(idx, IES1000_RUNMOD_OFFGRID);
  422. sm_set_step(sm, 500);
  423. sm_set_count(sm, 0);
  424. }*/
  425. else if (n9_get_runstat(idx) != N9_RUNSTAT_RUN)
  426. {
  427. log_dbg("%s, idx:%d, state:%s, step:%d, run state != idle detected, %d, goto err",
  428. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), n9_get_runstat(idx));
  429. sm_set_state(sm, SMST_ERR, N9ERR_READY_NOSTART_DETECTED);
  430. }
  431. }
  432. else if (sm_get_step(sm) == 20)
  433. { /* wait and chk run state = stop */
  434. if (n9_get_runstat(idx) == N9_RUNSTAT_IDLE)
  435. {
  436. log_dbg("%s, idx:%d, state:%s, step:%d, dev run state = stop detected, goto stop",
  437. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  438. sm_set_state(sm, SMST_STOP, N9ERR_NONE);
  439. }
  440. else
  441. {
  442. sm_inc_count(sm);
  443. if (sm_get_count(sm) >= 100)
  444. {
  445. log_dbg("%s, idx:%d, state:%s, step:%d, wait dev run state = stop timeout, goto err",
  446. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  447. sm_set_state(sm, SMST_ERR, N9ERR_READY_WAIT_STOP_TIMEOUT);
  448. }
  449. else
  450. {
  451. if (sm_get_count(sm) % 50 == 0)
  452. {
  453. log_dbg("%s, idx:%d, state:%s, step:%d, waiting dev run state = stop, count:%d",
  454. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  455. }
  456. }
  457. }
  458. }
  459. else if (sm_get_step(sm) == 30)
  460. { // chk ap > 0
  461. if (ap > 0)
  462. { /* chk ok */
  463. log_dbg("%s, idx:%d, state:%s, step:%d, ap > 0 detected, %d, goto dhg",
  464. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), ap);
  465. sm_set_state(sm, SMST_DHG, N9ERR_NONE);
  466. }
  467. else
  468. {
  469. sm_inc_count(sm);
  470. if (sm_get_count(sm) >= 100)
  471. {
  472. sm_set_state(sm, SMST_ERR, N9ERR_READY_WAIT_AP_OVER_0_TIMEOUT);
  473. log_dbg("%s, idx:%d, state:%s, step:%d, wait ap > 0 for dhg timeout, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  474. }
  475. else
  476. {
  477. if (sm_get_count(sm) % 50 == 0)
  478. {
  479. log_dbg("%s, idx:%d, state:%s, step:%d, waiting ap > 0 for dhg, count:%d",
  480. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  481. }
  482. }
  483. }
  484. }
  485. else if (sm_get_step(sm) == 40)
  486. { // chk ap for chg
  487. if (ap < 0)
  488. { /* chk ok */
  489. log_dbg("%s, idx:%d, state:%s, step:%d, ap = %d < 0 detected, goto chg",
  490. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), ap);
  491. sm_set_state(sm, SMST_CHG, N9ERR_NONE);
  492. }
  493. else
  494. {
  495. sm_inc_count(sm);
  496. if (sm_get_count(sm) >= 100)
  497. {
  498. sm_set_state(sm, SMST_ERR, N9ERR_READY_WAIT_AP_UNDER_0_TIMEOUT);
  499. log_dbg("%s, idx:%d, state:%s, step:%d, wait ap < 0 for chg timeout, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  500. }
  501. else
  502. {
  503. if (sm_get_count(sm) % 50 == 0)
  504. {
  505. log_dbg("%s, idx:%d, state:%s, step:%d, waiting ap < 0 for chg, count:%d",
  506. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  507. }
  508. }
  509. }
  510. } /*else if( sm_get_step(sm) == 500 ){ // wait run mode = offgrid for offgrid
  511. if( IES1000_RUNMOD_OFFGRID == ies1000_get_runmod(idx) ){
  512. log_dbg("%s, idx:%d, state:%s, step:%d, chk run mode = offgrid ok, set dev startcmd, wait and chk voltage",__func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  513. ies1000_set_dev_startcmd(idx);
  514. sm_set_step(sm, 501);
  515. sm_set_count(sm, 0);
  516. }else{
  517. sm_inc_count(sm);
  518. if( sm_get_count(sm) >= 100 ){ // 5s
  519. sm_set_state(sm, SMST_ERR, IES1000ERR_READY_WAIT_RUNMOD_OFFGRID_FOR_OFFGRID_TIMEOUT);
  520. log_dbg("%s, idx:%d, state:%s, step:%d, wait run mode = offgrid timeout, goto err",
  521. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  522. }else{
  523. log_dbg("%s, idx:%d, state:%s, step:%d, waiting run mode = offgrid, count:%d",
  524. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  525. }
  526. }
  527. }else if( sm_get_step(sm) == 501 ){ // chk voltage for offgrid
  528. if( ies1000_get_ua(idx) > 340.0 && ies1000_get_ua(idx) < 420.0){
  529. log_dbg("%s, idx:%d, state:%s, step:%d, chk voltage ok, %.1f, goto offgrid",__func__, idx, sm_get_szstate(sm), sm_get_step(sm), ies1000_get_ua(idx));
  530. sm_set_state(sm, SMST_OFFGRID, IES1000ERR_NONE);
  531. }else{
  532. sm_inc_count(sm);
  533. if( sm_get_count(sm) >= 300 ){ // 15s
  534. log_dbg("%s, idx:%d, state:%s, step:%d, wait voltage to 380 for offgrid timeout, goto err",__func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  535. sm_set_state(sm, SMST_ERR, IES1000ERR_READY_WAIT_TARGET_VOLTAGE_FOR_OFFGRID_TIMEOUT);
  536. }else{
  537. log_dbg("%s, idx:%d, state:%s, step:%d, wait target voltage for offgrid, count:%d",
  538. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  539. }
  540. }
  541. }*/
  542. }
  543. static void n9_sm_dhg(int idx)
  544. {
  545. struct n9_t *dev = &n9[idx];
  546. struct comm_t *comm = &dev->comm;
  547. struct statemachine_t *sm = &dev->sm;
  548. int aps = n9_get_aps(idx);
  549. int last_aps = n9_get_last_aps(idx);
  550. int ap = n9_get_ap(idx);
  551. /* chk comm state */
  552. if (comm_get_state(comm) != COMMST_NORMAL)
  553. {
  554. log_dbg("%s, idx:%d, state:%s, step:%d, comm err detected, goto err",
  555. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  556. sm_set_state(sm, SMST_ERR, N9ERR_DHG_COMMERR);
  557. return;
  558. }
  559. if (sm_get_step(sm) == 0)
  560. { // entry
  561. log_dbg("%s, idx:%d, state:%s, step:%d, entry", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  562. n9_reset_cmd(idx);
  563. sm_set_step(sm, 10);
  564. n9_reset_bsytikchk(idx);
  565. gt_reset_bsytikchk(idx);
  566. }
  567. else if (sm_get_step(sm) == 10)
  568. { // wait and chk
  569. if (n9_get_cmd(idx) == CMD_SM_READY)
  570. { // ready cmd
  571. log_dbg("%s, idx:%d, state:%s, step:%d, got ready cmd, set dev aps = 0, wait and chk",
  572. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  573. n9_reset_cmd(idx);
  574. n9_set_dev_aps(idx, 0);
  575. sm_set_step(sm, 30);
  576. sm_set_count(sm, 0);
  577. }
  578. else if (n9_get_runstat(idx) != N9_RUNSTAT_RUN)
  579. {
  580. log_dbg("%s, idx:%d, state:%s, step:%d, run state != dhg detected, set dev aps to 0, goto err",
  581. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  582. n9_set_dev_aps(idx, 0);
  583. sm_set_state(sm, SMST_ERR, N9ERR_DHG_NONDHG_DETECTED);
  584. }
  585. else if (aps < 0)
  586. { // aps <= 0
  587. log_dbg("%s, idx:%d, state:%s, step:%d, aps <= 0 detected, %d, set dev aps = 0, wait and chk",
  588. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), aps);
  589. n9_set_dev_aps(idx, 0);
  590. sm_set_step(sm, 30);
  591. sm_set_count(sm, 0);
  592. }
  593. else if (n9_is_aps_changed(idx))
  594. { // new aps, set devaps and chk
  595. log_dbg("%s, idx:%d, state:%s, step:%d, new aps detected, %d -> %d, set dev aps",
  596. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), last_aps, aps);
  597. n9_set_aps(idx, aps); // update last aps
  598. n9_set_dev_aps(idx, aps);
  599. }
  600. else if (n9_is_bsytikchk_timeout(idx))
  601. {
  602. log_dbg("%s, idx:%d, state:%s, step:%d, bsytik timeout detected, set dev aps to 0",
  603. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  604. n9_set_aps(idx, 0);
  605. }
  606. }
  607. else if (sm_get_step(sm) == 30)
  608. { // chk dev aps = 0 for readycmd
  609. if (n9_get_dev_aps(idx) == 0)
  610. {
  611. log_dbg("%s, idx:%d, state:%s, step:%d, chk dev aps = 0 ok, wait and chk ap",
  612. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  613. sm_set_step(sm, 31);
  614. sm_set_count(sm, 0);
  615. }
  616. else
  617. {
  618. sm_inc_count(sm);
  619. if (sm_get_count(sm) >= 100)
  620. {
  621. sm_set_state(sm, SMST_ERR, N9ERR_DHG_WAIT_DEVAPS0_FOR_READYCMD_TIMEOUT);
  622. log_dbg("%s, idx:%d, state:%s, step:%d, wait dev aps = 0 for readycmd timeout, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  623. }
  624. else
  625. {
  626. if (sm_get_count(sm) % 50 == 0)
  627. {
  628. log_dbg("%s, idx:%d, state:%s, step:%d, waiting dev aps = 0 for readycmd, count:%d",
  629. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  630. }
  631. }
  632. }
  633. }
  634. else if (sm_get_step(sm) == 31)
  635. { // chk ap = 0 for readycmd
  636. if (ap < 2 && ap > -2)
  637. {
  638. log_dbg("%s, idx:%d, state:%s, step:%d, chk ap ok for readycmd, ap now: %d, goto ready",
  639. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), ap);
  640. if (n9_is_bsytikchk_timeout(idx))
  641. {
  642. sm_set_state(sm, SMST_ERR, N9ERR_DHG_TICK_TIMEOUT_DETECTED);
  643. }
  644. else
  645. {
  646. sm_set_state(sm, SMST_READY, N9ERR_NONE);
  647. }
  648. }
  649. else
  650. {
  651. sm_inc_count(sm);
  652. if (sm_get_count(sm) >= 100)
  653. {
  654. log_dbg("%s, idx:%d, state:%s, step:%d, wait ap = 0 for readycmd timeout, ap still: %d, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm), ap);
  655. sm_set_state(sm, SMST_ERR, N9ERR_DHG_WAIT_AP0_FOR_READYCMD_TIMEOUT);
  656. }
  657. else
  658. {
  659. if (sm_get_count(sm) % 50 == 0)
  660. {
  661. log_dbg("%s, idx:%d, state:%s, step:%d, waiting ap = 0 for readycmd, count:%d, ap still:%d",
  662. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm), ap);
  663. }
  664. }
  665. }
  666. }
  667. }
  668. static void n9_sm_chg(int idx)
  669. {
  670. struct n9_t *dev = &n9[idx];
  671. struct comm_t *comm = &dev->comm;
  672. struct statemachine_t *sm = &dev->sm;
  673. int aps = n9_get_aps(idx);
  674. int last_aps = n9_get_last_aps(idx);
  675. int ap = n9_get_ap(idx);
  676. /* chk comm state */
  677. if (comm_get_state(comm) != COMMST_NORMAL)
  678. {
  679. log_dbg("%s, idx:%d, state:%s, step:%d, comm err detected, goto err",
  680. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  681. sm_set_state(sm, SMST_ERR, N9ERR_CHG_COMMERR);
  682. return;
  683. }
  684. if (sm_get_step(sm) == 0)
  685. { // entry
  686. log_dbg("%s, idx:%d, state:%s, step:%d, entry", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  687. n9_reset_cmd(idx);
  688. sm_set_step(sm, 10);
  689. n9_reset_bsytikchk(idx);
  690. gt_reset_bsytikchk(idx);
  691. }
  692. else if (sm_get_step(sm) == 10)
  693. { // wait and chk
  694. if (n9_get_cmd(idx) == CMD_SM_READY)
  695. {
  696. log_dbg("%s, idx:%d, state:%s, step:%d, got ready cmd, set dev aps = 0",
  697. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  698. n9_reset_cmd(idx);
  699. n9_set_dev_aps(idx, 0);
  700. sm_set_step(sm, 30);
  701. sm_set_count(sm, 0);
  702. }
  703. else if (n9_get_runstat(idx) != N9_RUNSTAT_RUN)
  704. {
  705. log_dbg("%s, idx:%d, state:%s, step:%d, run state != chg detected, set dev aps to 0, goto err",
  706. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  707. n9_set_dev_aps(idx, 0);
  708. sm_set_state(sm, SMST_ERR, N9ERR_CHG_NONCHG_DETECTED);
  709. }
  710. else if (aps > 0)
  711. { // aps => 0
  712. log_dbg("%s, idx:%d, state:%s, step:%d, aps >= 0 detected, %d, set dev aps = 0, wait and chk",
  713. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), aps);
  714. n9_set_dev_aps(idx, 0);
  715. sm_set_step(sm, 30);
  716. sm_set_count(sm, 0);
  717. }
  718. else if (n9_is_aps_changed(idx))
  719. { /* new aps, set devaps and chk */
  720. log_dbg("%s, idx:%d, state:%s, step:%d, new aps detected, %d -> %d, set dev aps",
  721. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), last_aps, aps);
  722. n9_set_aps(idx, aps); // update last aps
  723. n9_set_dev_aps(idx, aps);
  724. }
  725. else if (n9_is_bsytikchk_timeout(idx))
  726. {
  727. log_dbg("%s, idx:%d, state:%s, step:%d, bsytik timeout detected, set dev aps to 0",
  728. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  729. n9_set_aps(idx, 0);
  730. }
  731. }
  732. else if (sm_get_step(sm) == 30)
  733. { // chk dev aps = 0 for readycmd
  734. if (n9_get_dev_aps(idx) == 0)
  735. {
  736. log_dbg("%s, idx:%d, state:%s, step:%d, chk dev aps = 0 ok, wait and chk ap",
  737. __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  738. sm_set_step(sm, 31);
  739. sm_set_count(sm, 0);
  740. }
  741. else
  742. {
  743. sm_inc_count(sm);
  744. if (sm_get_count(sm) >= 100)
  745. {
  746. sm_set_state(sm, SMST_ERR, N9ERR_CHG_WAIT_DEVAPS0_FOR_READYCMD_TIMEOUT);
  747. log_dbg("%s, idx:%d, state:%s, step:%d, wait dev aps = 0 for readycmd timeout, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm));
  748. }
  749. else
  750. {
  751. if (sm_get_count(sm) % 50 == 0)
  752. {
  753. log_dbg("%s, idx:%d, state:%s, step:%d, waiting dev aps = 0 for readycmd, count:%d",
  754. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm));
  755. }
  756. }
  757. }
  758. }
  759. else if (sm_get_step(sm) == 31)
  760. { // chk ap = 0 for readycmd
  761. if (ap < 2 && ap > -2)
  762. {
  763. log_dbg("%s, idx:%d, state:%s, step:%d, chk ap ok for readycmd, ap now: %d, goto ready",
  764. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), ap);
  765. if (n9_is_bsytikchk_timeout(idx))
  766. {
  767. sm_set_state(sm, SMST_ERR, N9ERR_CHG_TICK_TIMEOUT_DETECTED);
  768. }
  769. else
  770. {
  771. sm_set_state(sm, SMST_READY, N9ERR_NONE);
  772. }
  773. }
  774. else
  775. {
  776. sm_inc_count(sm);
  777. if (sm_get_count(sm) >= 100)
  778. {
  779. log_dbg("%s, idx:%d, state:%s, step:%d, wait ap = 0 for readycmd timeout, ap still :%d, goto err", __func__, idx, sm_get_szstate(sm), sm_get_step(sm), ap);
  780. sm_set_state(sm, SMST_ERR, N9ERR_CHG_WAIT_AP0_FOR_READYCMD_TIMEOUT);
  781. }
  782. else
  783. {
  784. if (sm_get_count(sm) % 50 == 0)
  785. {
  786. log_dbg("%s, idx:%d, state:%s, step:%d, waiting ap = 0 for readycmd, count:%d, ap still :%d",
  787. __func__, idx, sm_get_szstate(sm), sm_get_step(sm), sm_get_count(sm), ap);
  788. }
  789. }
  790. }
  791. }
  792. }
  793. void n9_sm(int idx)
  794. {
  795. struct n9_t *dev = &n9[idx];
  796. struct statemachine_t *sm = &dev->sm;
  797. sm_cal_timing(&dev->sm);
  798. if (device_power_on == 0)
  799. {
  800. n9_set_dev_aps(idx, 0);
  801. n9_set_dev_stopcmd(idx);
  802. sm_set_state(sm, SMST_ERR, N9ERR_ERR_PWROFF);
  803. }
  804. switch (sm_get_state(sm))
  805. {
  806. case SMST_LAUNCH:
  807. n9_sm_launch(idx);
  808. break;
  809. case SMST_STDBY:
  810. n9_sm_stdby(idx);
  811. break;
  812. case SMST_STOP:
  813. n9_sm_stop(idx);
  814. break;
  815. case SMST_OFFGRID:
  816. n9_sm_offgrid(idx);
  817. break;
  818. case SMST_READY:
  819. n9_sm_ready(idx);
  820. break;
  821. case SMST_DHG:
  822. n9_sm_dhg(idx);
  823. break;
  824. case SMST_CHG:
  825. n9_sm_chg(idx);
  826. break;
  827. case SMST_ERR:
  828. n9_sm_err(idx);
  829. break;
  830. default:
  831. log_dbg("%s, unknown state, %d", __func__, n9_get_state(idx));
  832. break;
  833. }
  834. }