ctnd/platform/device/ac/mc90hdnc1a/mc90hdnc1a_comm.c

#include "plt.h"

void mc90hdnc1a_comm_dac( int idx )
{
    unsigned short tab_us[128]={0};
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;
    int chanidx = comm->chanidx;
    int addr = comm->adr;
    int start, nb, rc, i;
    int ret = 0;

    if(comm_get_state(comm) != COMMST_NORMAL){
        return;
    }

    comm_start_cal_dac_timing(comm);

    nb = 52;
    start = 0x1000;
    chan_lock(chanidx);
    usleep(100000); // 100ms
    rc = chan_read_holdingregisters_with_retry( chanidx, addr, start, nb, tab_us);
    if( rc < 0){
        comm_set_state(comm, COMMST_ERR);
    }
    chan_unlock(chanidx);
    if( rc == 0 ){ /* read ok */
        mc90hdnc1a_set_workstat(idx, tab_us[0x1000 - start]);
        mc90hdnc1a_set_infan_stat(idx, tab_us[0x1002 - start]);
        mc90hdnc1a_set_outfan_stat(idx, tab_us[0x1004 - start]);
        mc90hdnc1a_set_compstat(idx, tab_us[0x1006 - start]);
        mc90hdnc1a_set_rtnwind_temp(idx, tab_us[0x1008 - start]/10);
        mc90hdnc1a_set_cond_temp(idx, tab_us[0x100E - start]/10);
        mc90hdnc1a_set_eva_temp(idx, tab_us[0x1010 - start]/10);
        mc90hdnc1a_set_infan_spd(idx, tab_us[0x1012 - start]);
        mc90hdnc1a_set_outfan_spd(idx, tab_us[0x1014 - start]);
    }else{
        return;
    }

    nb = 32;
    start = 0x0001;
    chan_lock(chanidx);
    usleep(100000); // 100ms
    rc = chan_read_holdingregisters_with_retry( chanidx, addr, start, nb, tab_us);
    if( rc < 0){
        comm_set_state(comm, COMMST_ERR);
    }
    chan_unlock(chanidx);
    
    if( rc == 0 ){ /* read ok */
        mc90hdnc1a_set_comp_start_temp(idx, tab_us[0x000A - start]/10);
        mc90hdnc1a_set_comp_gap_temp(idx, tab_us[0x000C - start]/10);
        mc90hdnc1a_set_heat_start_temp(idx, tab_us[0x001C - start]/10);
        mc90hdnc1a_set_heat_gap_temp(idx, tab_us[0x001E - start]/10);
    }else{
        return;
    }

    nb = 17;
    start = 0x0300;
    chan_lock(chanidx);
    usleep(100000); // 100ms
    rc = chan_read_holdingregisters_with_retry( chanidx, addr, start, nb, tab_us);
    if( rc < 0){
        comm_set_state(comm, COMMST_ERR);
    }
    chan_unlock(chanidx);
    
    if( 0 == rc ){ /* read ok */
        for( i = 1; i <= 17; i++ ){
            dev->warnings[i] = tab_us[0x0300 - start + i - 1]; 
        }
        comm_stop_cal_dac_timing(comm);    
    }else{
        return;
    }   
}

int mc90hdnc1a_set_dev_start( int idx)
{
    int ret = 0;
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    chan_lock(comm->chanidx);
    ret = chan_write_single_register_with_retry( comm->chanidx, comm->adr, 0x0202, 1);
    chan_unlock(comm->chanidx);
    log_dbg("%s, idx:%d", __func__, idx);
    return ret;
}

int mc90hdnc1a_set_dev_stop( int idx)
{
    int ret = 0;
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    chan_lock(comm->chanidx);
    ret = chan_write_single_register_with_retry( comm->chanidx, comm->adr, 0x0202, 2);
    chan_unlock(comm->chanidx);
    log_dbg("%s, idx:%d", __func__, idx);
    return ret;
}

int mc90hdnc1a_set_dev_comp_start_temp( int idx, int val)
{
    int ret = 0;
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    chan_lock(comm->chanidx);
    ret = chan_write_single_register_with_retry( comm->chanidx, comm->adr, 0x000A, val*10);
    chan_unlock(comm->chanidx);
    log_dbg("%s, idx:%d, val:%d, ret:%d", __func__, idx, val, ret);
    return ret;
}

int mc90hdnc1a_set_dev_comp_gap_temp( int idx, int val)
{
    int ret = 0;
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    chan_lock(comm->chanidx);
    ret = chan_write_single_register_with_retry( comm->chanidx, comm->adr, 0x000C, val*10);
    chan_unlock(comm->chanidx);
    log_dbg("%s, idx:%d, val:%d, ret:%d", __func__, idx, val, ret);
    return ret;
}

int mc90hdnc1a_set_dev_heat_start_temp( int idx, int val)
{
    int ret = 0;
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    chan_lock(comm->chanidx);
    ret = chan_write_single_register_with_retry( comm->chanidx, comm->adr, 0x001C, val*10);
    chan_unlock(comm->chanidx);
    log_dbg("%s, idx:%d, val:%d, ret:%d", __func__, idx, val, ret);
    return ret;
}

int mc90hdnc1a_set_dev_heat_gap_temp( int idx, int val)
{
    int ret = 0;
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    chan_lock(comm->chanidx);
    ret = chan_write_single_register_with_retry( comm->chanidx, comm->adr, 0x001E, val*10);
    chan_unlock(comm->chanidx);
    log_dbg("%s, idx:%d, val:%d, ret:%d", __func__, idx, val, ret);
    return ret;
}

int mc90hdnc1a_set_dev_mbadr( int idx, int val)
{
    int ret = 0;
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    chan_lock(comm->chanidx);
    ret = chan_write_single_register_with_retry( comm->chanidx, comm->adr, 0x0007, val);
    chan_unlock(comm->chanidx);
    log_dbg("%s, idx:%d, val:%d, ret:%d", __func__, idx, val, ret);
    return ret;
}

int mc90hdnc1a_comm_init(int idx)
{
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    comm_set_state( comm, COMMST_ERR );
}

int mc90hdnc1a_comm_reset(int idx)
{
    struct mc90hdnc1a_t* dev = &mc90hdnc1a[idx];
    struct comm_t* comm = &dev->comm;

    comm_set_state( comm, COMMST_NORMAL );
}