mbs.c 10 KB

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  1. #include "plt.h"
  2. #include "mbs.h"
  3. enum mbs_idx_t
  4. {
  5. MBSIDX_MDL = 0,
  6. MBSIDX_EMA = 1,
  7. };
  8. fmodbus_t *MB[4];
  9. /* ----------------------- Defines ------------------------------------------*/
  10. USHORT usHoldingRegisters[REG_HOLDING_NREGS] = {0};
  11. USHORT usInputRegisters[REG_INPUT_NREGS] = {0};
  12. UCHAR ucCoils[COIL_NCOILS] = {0};
  13. UCHAR ucDiscIn[DISC_NINPUT] = {0};
  14. static enum ThreadState {
  15. STOPPED,
  16. RUNNING,
  17. SHUTDOWN
  18. } ePollThreadState;
  19. static pthread_mutex_t xLock = PTHREAD_MUTEX_INITIALIZER;
  20. // static BOOL bDoExit;
  21. void *pvPollingThread(void *pvParameter)
  22. {
  23. fmodbus_t *ctx = (fmodbus_t *)pvParameter;
  24. // struct chan_t* chan = &mdl.chan[ctx->chanidx];
  25. log_dbg("%s, ++, mbsidx:%d", __func__, ctx->mbsidx);
  26. if (eMBEnable(ctx) == MB_ENOERR)
  27. {
  28. do
  29. {
  30. if (eMBPoll(ctx) != MB_ENOERR)
  31. break;
  32. } while (TRUE);
  33. }
  34. (void)eMBDisable(ctx);
  35. log_dbg("%s, --, mbsidx:%d", __func__, ctx->mbsidx);
  36. return NULL;
  37. }
  38. static void on_01_ReadCoil(fmodbus_t *ctx)
  39. {
  40. // struct chan_t* chan = &mdl.chan[ctx->chanidx];
  41. // int mbsidx = chan->mbsidx;
  42. // int mbsdevidx = chan->mbsdevidx;
  43. // struct cess2000_t *dev = &cess2000[1];
  44. // short temp = 0;
  45. // struct bcu_t* bcu = &mdl.catl280a[1].bcu[1];
  46. // int bmuidx, moduleidx, cellidx, tempidx;
  47. // if( chan->dbg > 0 ){
  48. // log_dbg("%s, chanidx:%d, mbsidx:%d, mbsdevm:%d, mbsdevidx:%d",
  49. // __func__, ctx->chanidx, chan->mbsidx, chan->mbsdevm, chan->mbsdevidx);
  50. // }
  51. ucCoils[0x6020 - COIL_START] = MDL.uab * 10;
  52. }
  53. static void on_05_WriteCoil(fmodbus_t *ctx)
  54. {
  55. // struct chan_t* chan = &mdl.chan[ctx->chanidx];
  56. // int mbsidx = chan->mbsidx;
  57. // int mbsdevidx = chan->mbsdevidx;
  58. // struct cess2000_t *dev = &cess2000[1];
  59. // short temp = 0;
  60. // struct bcu_t* bcu = &mdl.catl280a[1].bcu[1];
  61. // int bmuidx, moduleidx, cellidx, tempidx;
  62. // if( chan->dbg > 0 ){
  63. // log_dbg("%s, chanidx:%d, mbsidx:%d, mbsdevm:%d, mbsdevidx:%d",
  64. // __func__, ctx->chanidx, chan->mbsidx, chan->mbsdevm, chan->mbsdevidx);
  65. // }
  66. MDL.uab = ucCoils[0x6020 - COIL_START] / 10;
  67. }
  68. static void on_02_ReadDiscrete(fmodbus_t *ctx)
  69. {
  70. // struct chan_t* chan = &mdl.chan[ctx->chanidx];
  71. // int mbsidx = chan->mbsidx;
  72. // int mbsdevidx = chan->mbsdevidx;
  73. // struct cess2000_t *dev = &cess2000[1];
  74. // short temp = 0;
  75. // struct bcu_t* bcu = &mdl.catl280a[1].bcu[1];
  76. // int bmuidx, moduleidx, cellidx, tempidx;
  77. // if( chan->dbg > 0 ){
  78. // log_dbg("%s, chanidx:%d, mbsidx:%d, mbsdevm:%d, mbsdevidx:%d",
  79. // __func__, ctx->chanidx, chan->mbsidx, chan->mbsdevm, chan->mbsdevidx);
  80. // }
  81. ucDiscIn[0x6020 - DISC_START] = MDL.uab * 10;
  82. }
  83. static void on_04_ReadInputRegisters(fmodbus_t *ctx)
  84. {
  85. // struct chan_t* chan = &mdl.chan[ctx->chanidx];
  86. // int mbsidx = chan->mbsidx;
  87. // int mbsdevidx = chan->mbsdevidx;
  88. // struct cess2000_t *dev = &cess2000[1];
  89. // short temp = 0;
  90. // struct bcu_t* bcu = &mdl.catl280a[1].bcu[1];
  91. // int bmuidx, moduleidx, cellidx, tempidx;
  92. // if( chan->dbg > 0 ){
  93. // log_dbg("%s, chanidx:%d, mbsidx:%d, mbsdevm:%d, mbsdevidx:%d",
  94. // __func__, ctx->chanidx, chan->mbsidx, chan->mbsdevm, chan->mbsdevidx);
  95. // }
  96. ucDiscIn[0 - REG_INPUT_START] = MDL.ua;
  97. ucDiscIn[1 - REG_INPUT_START] = MDL.ub;
  98. }
  99. // process 03
  100. static void on_03_ReadMultipleHoldingRegisters(fmodbus_t *ctx)
  101. {
  102. // struct chan_t* chan = &mdl.chan[ctx->chanidx];
  103. // int mbsidx = chan->mbsidx;
  104. // int mbsdevidx = chan->mbsdevidx;
  105. // struct cess2000_t *dev = &cess2000[1];
  106. // short temp = 0;
  107. // struct bcu_t* bcu = &mdl.catl280a[1].bcu[1];
  108. // int bmuidx, moduleidx, cellidx, tempidx;
  109. // if( chan->dbg > 0 ){
  110. // log_dbg("%s, chanidx:%d, mbsidx:%d, mbsdevm:%d, mbsdevidx:%d",
  111. // __func__, ctx->chanidx, chan->mbsidx, chan->mbsdevm, chan->mbsdevidx);
  112. // }
  113. usHoldingRegisters[0x6020 - REG_HOLDING_START] = MDL.uab * 10;
  114. usHoldingRegisters[0x6021 - REG_HOLDING_START] = MDL.ubc * 10;
  115. usHoldingRegisters[0x6022 - REG_HOLDING_START] = MDL.uca * 10;
  116. usHoldingRegisters[0x6026 - REG_HOLDING_START] = MDL.ia * 10;
  117. usHoldingRegisters[0x6027 - REG_HOLDING_START] = MDL.ib * 10;
  118. usHoldingRegisters[0x6028 - REG_HOLDING_START] = MDL.ic * 10;
  119. }
  120. // 06
  121. static void on_06_WriteSingleHoldingRegister(fmodbus_t *ctx)
  122. {
  123. MDL.uab = usHoldingRegisters[0x6020 - REG_HOLDING_START] / 10.0;
  124. MDL.ubc = usHoldingRegisters[0x6021 - REG_HOLDING_START] / 10.0;
  125. MDL.uca = usHoldingRegisters[0x6022 - REG_HOLDING_START] / 10.0;
  126. MDL.ia = usHoldingRegisters[0x6026 - REG_HOLDING_START] / 10.0;
  127. MDL.ib = usHoldingRegisters[0x6027 - REG_HOLDING_START] / 10.0;
  128. MDL.ic = usHoldingRegisters[0x6028 - REG_HOLDING_START] / 10.0;
  129. }
  130. eMBErrorCode eMBRegInputCB(fmodbus_t *ctx, UCHAR *pucRegBuffer, USHORT usAddress, USHORT usNRegs)
  131. {
  132. eMBErrorCode eStatus = MB_ENOERR;
  133. int iRegIndex;
  134. if (ctx->mbsidx == MBSIDX_MDL)
  135. {
  136. if ((usAddress >= REG_INPUT_START) && (usAddress + usNRegs <= REG_INPUT_START + REG_INPUT_NREGS))
  137. {
  138. // iRegIndex = (int)(usAddress - usRegInputStart_PCS[chan->mbsidx]);
  139. on_04_ReadInputRegisters(ctx);
  140. iRegIndex = (int)(usAddress - REG_INPUT_START);
  141. while (usNRegs > 0)
  142. {
  143. *pucRegBuffer++ = (UCHAR)(usInputRegisters[iRegIndex] >> 8);
  144. *pucRegBuffer++ = (UCHAR)(usInputRegisters[iRegIndex] & 0xFF);
  145. iRegIndex++;
  146. usNRegs--;
  147. }
  148. }
  149. else
  150. {
  151. eStatus = MB_ENOREG;
  152. }
  153. return eStatus;
  154. }
  155. return MB_ENOREG;
  156. }
  157. eMBErrorCode eMBRegHoldingCB(fmodbus_t *ctx, UCHAR *pucRegBuffer, USHORT usAddress, USHORT usNRegs, eMBRegisterMode eMode)
  158. {
  159. eMBErrorCode eStatus = MB_ENOERR;
  160. int iRegIndex;
  161. if (ctx->mbsidx == MBSIDX_MDL)
  162. { // ctn modbus tcp slave
  163. if ((usAddress >= REG_HOLDING_START) && (usAddress + usNRegs <= REG_HOLDING_START + REG_HOLDING_NREGS))
  164. {
  165. iRegIndex = (int)(usAddress - REG_HOLDING_START);
  166. switch (eMode)
  167. {
  168. /* Pass current register values to the protocol stack. */
  169. case MB_REG_READ:
  170. on_03_ReadMultipleHoldingRegisters(ctx);
  171. while (usNRegs > 0)
  172. {
  173. *pucRegBuffer++ = (UCHAR)(usHoldingRegisters[iRegIndex] >> 8);
  174. *pucRegBuffer++ = (UCHAR)(usHoldingRegisters[iRegIndex] & 0xFF);
  175. iRegIndex++;
  176. usNRegs--;
  177. }
  178. break;
  179. /* Update current register values with new values from the
  180. * protocol stack. */
  181. case MB_REG_WRITE:
  182. while (usNRegs > 0)
  183. {
  184. usHoldingRegisters[iRegIndex] = *pucRegBuffer++ << 8;
  185. usHoldingRegisters[iRegIndex] |= *pucRegBuffer++;
  186. iRegIndex++;
  187. usNRegs--;
  188. }
  189. on_06_WriteSingleHoldingRegister(ctx);
  190. break;
  191. }
  192. }
  193. else
  194. {
  195. eStatus = MB_ENOREG;
  196. }
  197. return eStatus;
  198. }
  199. }
  200. eMBErrorCode eMBRegCoilsCB(fmodbus_t *ctx, UCHAR *pucRegBuffer, USHORT usAddress, USHORT usNCoils, eMBRegisterMode eMode)
  201. {
  202. eMBErrorCode eStatus = MB_ENOERR;
  203. int iRegIndex;
  204. if (ctx->mbsidx == MBSIDX_MDL)
  205. { // ctn modbus tcp slave
  206. if ((usAddress >= COIL_START) && (usAddress + usNCoils <= COIL_START + COIL_NCOILS))
  207. {
  208. iRegIndex = (int)(usAddress - COIL_START);
  209. switch (eMode)
  210. {
  211. /* Pass current register values to the protocol stack. */
  212. case MB_REG_READ:
  213. on_01_ReadCoil(ctx);
  214. while (usNCoils > 0)
  215. {
  216. *pucRegBuffer++ = ucCoils[iRegIndex];
  217. iRegIndex++;
  218. usNCoils--;
  219. }
  220. break;
  221. /* Update current register values with new values from the
  222. * protocol stack. */
  223. case MB_REG_WRITE:
  224. while (usNCoils > 0)
  225. {
  226. ucCoils[iRegIndex] = *pucRegBuffer++;
  227. iRegIndex++;
  228. usNCoils--;
  229. }
  230. on_05_WriteCoil(ctx);
  231. break;
  232. }
  233. }
  234. else
  235. {
  236. eStatus = MB_ENOREG;
  237. }
  238. return eStatus;
  239. }
  240. return MB_ENOREG;
  241. }
  242. eMBErrorCode eMBRegDiscreteCB(fmodbus_t *ctx, UCHAR *pucRegBuffer, USHORT usAddress, USHORT usNDiscrete)
  243. {
  244. eMBErrorCode eStatus = MB_ENOERR;
  245. int iRegIndex;
  246. if (ctx->mbsidx == MBSIDX_MDL)
  247. {
  248. if ((usAddress >= DISC_START) && (usAddress + usNDiscrete <= DISC_START + DISC_NINPUT))
  249. {
  250. // iRegIndex = (int)(usAddress - usRegInputStart_PCS[chan->mbsidx]);
  251. on_02_ReadDiscrete(ctx);
  252. iRegIndex = (int)(usAddress - DISC_START);
  253. while (usNDiscrete > 0)
  254. {
  255. *pucRegBuffer++ = ucDiscIn[iRegIndex];
  256. iRegIndex++;
  257. usNDiscrete--;
  258. }
  259. }
  260. else
  261. {
  262. eStatus = MB_ENOREG;
  263. }
  264. return eStatus;
  265. }
  266. }
  267. int mbs_start_MDL()
  268. {
  269. int ret = 0;
  270. const UCHAR ucSlaveID[] = {0xAA, 0xBB, 0xCC};
  271. pthread_t xthrd;
  272. if (eMBInit(&MB[MBSIDX_MDL], MB_RTU, MDL.nModbusAddr, MDL.szSerial, 9600, MB_PAR_NONE) != MB_ENOERR)
  273. {
  274. log_dbg("%s, eMBTCPInit fail", __func__);
  275. ret = -1;
  276. }
  277. else if (eMBSetSlaveID(MB[MBSIDX_MDL], 0x34, TRUE, ucSlaveID, 3) != MB_ENOERR)
  278. {
  279. log_dbg("%s, eMBSetSlaveID fail", __func__);
  280. ret = -2;
  281. }
  282. else
  283. {
  284. MB[MBSIDX_MDL]->mbsidx = MBSIDX_MDL;
  285. if (pthread_create(&xthrd, NULL, pvPollingThread, MB[MBSIDX_MDL]) != 0)
  286. {
  287. log_dbg("%s, pthread_create fail", __func__);
  288. ret = -3;
  289. }
  290. else
  291. {
  292. log_dbg("%s, start ok", __func__);
  293. }
  294. }
  295. return ret;
  296. }